Semiconductor chips provide memory storage for electronic devices and have become very popular in the electronic products industry. In general, many semiconductor chips are typically formed (or built) on a silicon wafer. The semiconductor chips are individually separated from the wafer for subsequent use as memory in electronic devices. In this regard, the semiconductor chips define memory cells that are configured to store retrievable data, often characterized by the logic values of 0 and 1.
Phase change memory cells are one type of memory cell capable of storing retrievable data between two or more separate states (or phases). The phase change memory cells have a structure that can generally be switched between states. For example, the atomic structure of one type of phase change memory cells can be switched between an amorphous state and one or more crystalline states. In this regard, the atomic structure can be switched between a general amorphous state and multiple crystalline states, or the atomic structure can be switched between a general amorphous state and a uniform crystalline state. In general terms, the amorphous state can be characterized as having more electrical resistivity than the crystalline state(s), and typically includes a disordered atomic structure. In contrast, the crystalline state(s) generally has a highly ordered atomic structure and is associated with having a higher electrical conductivity than the amorphous state.
Materials that exhibit this phase change memory characteristic include the elements of Group VI of the periodic table (and their alloys), such as Tellurium and Selenium, referred to as chalcogenides or chalcogenic materials. Other non-chalcogenide materials also exhibit phase change memory characteristics. One characteristic of chalcogenides is that the electrical resistivity varies between the amorphous state and the crystalline state(s), and this characteristic can be beneficially employed in two level or multiple level systems where the resistivity is either a function of the bulk material or a function of the partial material. As a point of reference, it is relatively easy to change a chalcogenide between the amorphous state (exhibiting a disordered structure, for example, like a frozen liquid) and the crystalline state(s) (exhibiting a regular atomic structure). In this manner, manipulating the states of the chalcogenide permits a selective control over the electrical properties of the chalcogenide, which is useful in the storage and retrieval of data from the memory cell containing the chalcogenide.
The atomic structure of the chalcogenide can be selectively changed by the application of energy. With regard to chalcogenides in general, at below temperatures of approximately 150 degrees Celsius both the amorphous and crystalline states are stable. A nucleation of crystals within the chalcogenide can be initiated when temperatures are increased to the crystallization temperature for the particular chalcogenide (approximately 200 degrees Celsius). In particular, the atomic structure of a chalcogenide becomes highly ordered when maintained at the crystallization temperature, such that a subsequent slow cooling of the material results in a stable orientation of the atomic structure in the highly ordered (crystalline) state. To achieve the amorphous state in the chalcogenide material, the local temperature is generally raised above the melting temperature (approximately 600° C.) to achieve a highly random atomic structure, and then rapidly cooled to “lock” the atomic structure in the amorphous state.
In one known structure of a phase change memory cell, the memory cell is formed at the intersection of a phase change memory material (chalcogenide) and a resistive electrode. Passing an electrical current of an appropriate value through the resistive electrode heats the phase change memory cell, thus affecting a phase change in its atomic structure by the principals described above. In this manner, the phase change memory cell can be selectively switched between logic states 0 and 1, and/or selectively switched between multiple logic states.
With the above background in mind, the known lithographic techniques for forming phase change memory cells can be improved upon. In particular, the known lithographic techniques for forming phase change memory cells result in large contact areas between the resistive electrode and the phase change memory material such that temperature induced changes between logic states is not optimum.